The present invention relates, in general, to comparator circuits and, more particularly, to comparator circuits having hysteresis.
Comparator circuits are used in a wide range of applications including battery protection circuitry, switching circuitry, control circuitry, etc. Typically, comparator circuits are comprised of a differential amplifier having a reference input terminal coupled for receiving a reference potential and an input terminal coupled for receiving a time-varying input signal. The reference potential is often referred to as the setpoint. The output signal of the comparator circuit changes state when the amplitude of the time-varying input signal rises above or falls below the reference potential.
Comparator circuits used in noisy environments also include hysteresis circuitry to prevent the output signal of the comparator circuit from changing states when large transient voltage signals are superimposed on the time-varying input signal. A common technique for providing hysteresis is to form a feedback loop from the output to the input of the differential amplifier. Once the output signal changes state in response to the input signal exceeding the reference potential, the feedback loop reduces the reference potential. Hence, the input signal must decrease to a value lower than the reduced reference potential to switch the output state of the differential amplifier back to its original operating state.
Drawbacks of these prior art comparator circuits include slow output signal switching speeds when the setpoint is reached and variation in the setpoint with variation in power supply voltage. In addition, these prior art comparator circuits consume a large amount of power and area.
Accordingly, it would be advantageous to have a comparator circuit that provides a fast comparison when a defined setpoint is reached and is suitable for use in low power applications. Other desirable features of the comparator circuit include the presence of hysteresis circuitry to prevent erroneous trip point indications and high power supply rejection properties to prevent variations in the setpoint. It would be of further advantage for the comparator circuit to be manufacturable in an integrated circuit manufacturing process and to be power and area efficient.